CEDEC has been appointed by MOHE as a central coordinator on EDA tools management and served as a facilitator in some training modules known as specific to analog IC design. Most of the trainers are from the industry identified by MIMOS.
In the Post School Finishing (PSF)training programme, all the lecturers in microelectronic were involved.
The PSF programme aims to produce an industry-ready engineer and train the Integrated Circuit (IC) design trainers. The lecturers that were involved in the training will use the module to embed in the related syllabus. The main of the course contents are:
1. Custom layout design
2. Analog IC design
3. Digital IC design for front end and back end
4. Design for Test (DFT)
Up to date, nearly 275 fresh engineers and lecturers were trained under this PSF programme. Each university will have its own set of EDA tools for teaching and learning through this programme. 270 EDA tools licenses were installed at the CEDEC server and shared with all the universities in Malaysia.
In the Post School Finishing (PSF)training programme, all the lecturers in microelectronic were involved.
The PSF programme aims to produce an industry-ready engineer and train the Integrated Circuit (IC) design trainers. The lecturers that were involved in the training will use the module to embed in the related syllabus. The main of the course contents are:
1. Custom layout design
2. Analog IC design
3. Digital IC design for front end and back end
4. Design for Test (DFT)
Up to date, nearly 275 fresh engineers and lecturers were trained under this PSF programme. Each university will have its own set of EDA tools for teaching and learning through this programme. 270 EDA tools licenses were installed at the CEDEC server and shared with all the universities in Malaysia.
