Multi Project Wafer
Technology | 3Q21 | 4Q21 | 1Q22 | 2Q22 | 3Q22 | 4Q22 |
---|---|---|---|---|---|---|
C18G | Aug 3 | Feb 1 | Sept 2 | |||
C13/C11 | Nov 23 | Nov 29 |
Note:
- The above schedule is subject to change.
- The final GDSii file, DRC summary report file, LVS report file and DIFFCAD form to be submitted during CEDEC's shuttle due date.
CEDEC will permit customer to participate in Multi-Project Wafer (silicon Verification) programme where fabrication of chip designed by customer will be carried out at Silterra Malaysia Sdn Bhd on a special rate basis.
(*) Each for 20 bare dices with 2mm x 2mm
Please send to us the following documents:
- Application form [download here]
- GDSII file
- DRC and LVS report files
1. Release PO under the name of Bendahari USM after CEDEC sent a quotation.
2. Send original copy of the PO to:
Collaborative Micro-electronic Design Excellence Centre (CEDEC)
Sains@USM, Level 1, Block C, No. 10,
Persiaran Bukit Jambul,
11900 Bayan Lepas,
Pulau Pinang.
Attention: MPW Administration
3. Please proceed for payment after received the invoice from CEDEC.
For further assistance, please email to :